case study # 08

Ferroelectric Memory


Our client, a developer of ferroelectric random access memory products, had a legacy integrated circuit that counted revolutions in motors. This IC was embedded in a larger product offering for the automotive industry. It was successful in the marketplace and demand remained strong, however the IC fabrication house was shutting down production. As such, our client required a re-design of this popular chip for a new fabrication house. However the design files had been lost and the previous designer had moved on.

Kapik was tasked with re-designing the counter ASIC based off the retired IC's datasheet and the few remaining schematics. The counter need to work within a module that contained a combined Wiegand/Hall sensor, which provided both counter stimulus and bursts of energy for the counter ASIC. We were required to meet the following requirements:

  • Work within a strict energy budget: The Wiegand sensor provides a finite quantum of energy for every half-rotation. All of the chip's count operations needed to complete within a fixed energy budget.
  • Read/Store count values and perform count operations: The ASICs operations per count consisted of reading and modifying FeRAM, performing ECC and arithmetic operations, and implementing FeRAM anti-wearout algorithms.
  • Provide a I2C-based readout and monitoring interface: Both counter and serial number memory needed to be accessible for diagnostic and readout. The count-logic needed to arbitrate FeRAM operations between I2C and the Wiegand sensor so as to prevent data corruption due to simultaneous access.
  • Operate from two power sources: The I2C interface, when used, would provide its own power supply. The counter needed to work when powered from either supply, but also needed to be smart enough to know the staging order of the power supplies as well. System variability of the I2C power-up and power-down scenarios posed a threat to data corruption, due to brownouts and power-bounce, and needed to be taken into account as well.
  • Meet rigid specifications for automotive electronics: The ASIC would need to perform reliably under a variety of harsh conditions. Kapik was instructed that some chips (after wafer sort) would also be required to meet military-grade operating conditions as well.

Kapik successfully delivered an ASIC that met all of the client's requirements. However, what really pleased the client was our use of scripted regression tests to ensure verification was rigorous but fast -- thereby enabling them to confidently bring the new ASIC from design to fabrication. To achieve this, we:

  • Developed a customized verification methodology: The ASIC was a combination of digital logic, analog circuits and custom memory IP. Our regression script methodology allowed us to test the each sub-component independently, but also allowed us to regression test the system as a whole. This played a vital role closer to tape-out, when the customer had to force some last minute engineering change orders (ECOs) that required re-verification. Instead of needing weeks to re-verify, our automated self-checking scripts had the design fully re-verified the day after the ECO was issued.
  • Innovated to meet the customer's requirements: The customer, having been burned by power-up simulation issues in the past, required that each and every simulation be run from power-up. This presented challenges when performing a parametric sweep or Monte Carlo analyses on individual blocks because the power-up to analysis part of the simulation was unbalanced at times 100:1. But Kapik's scripted verification strategy enabled us to resolve this issue by decoupling the power-up part of the simulation from the analysis part. It allowed power-up to be run only once per process corner, and then re-used the saved nodal voltages for the ensuing parametric or Monte Carlo analyses.

The design that Kapik delivered satisfied our customer’s desire for continuity while incrementally evolving the value of their product

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Tags: automotive, power, sensor